388 lines
14 KiB
C++
388 lines
14 KiB
C++
/* Definitions for code generation pass of GNU compiler.
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Copyright (C) 2001-2023 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#ifndef GCC_OPTABS_H
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#define GCC_OPTABS_H
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#include "optabs-query.h"
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#include "optabs-libfuncs.h"
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#include "vec-perm-indices.h"
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/* Generate code for a widening multiply. */
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extern rtx expand_widening_mult (machine_mode, rtx, rtx, rtx, int, optab);
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/* Describes the type of an expand_operand. Each value is associated
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with a create_*_operand function; see the comments above those
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functions for details. */
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enum expand_operand_type {
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EXPAND_FIXED,
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EXPAND_OUTPUT,
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EXPAND_INPUT,
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EXPAND_CONVERT_TO,
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EXPAND_CONVERT_FROM,
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EXPAND_ADDRESS,
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EXPAND_INTEGER
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};
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/* Information about an operand for instruction expansion. */
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class expand_operand {
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public:
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/* The type of operand. */
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ENUM_BITFIELD (expand_operand_type) type : 8;
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/* True if any conversion should treat VALUE as being unsigned
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rather than signed. Only meaningful for certain types. */
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unsigned int unsigned_p : 1;
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/* Is the target operand. */
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unsigned int target : 1;
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/* Unused; available for future use. */
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unsigned int unused : 6;
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/* The mode passed to the convert_*_operand function. It has a
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type-dependent meaning. */
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ENUM_BITFIELD (machine_mode) mode : 16;
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/* The value of the operand. */
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rtx value;
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/* The value of an EXPAND_INTEGER operand. */
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poly_int64 int_value;
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};
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/* Initialize OP with the given fields. Initialise the other fields
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to their default values. */
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inline void
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create_expand_operand (class expand_operand *op,
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enum expand_operand_type type,
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rtx value, machine_mode mode,
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bool unsigned_p, poly_int64 int_value = 0)
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{
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op->type = type;
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op->unsigned_p = unsigned_p;
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op->target = 0;
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op->unused = 0;
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op->mode = mode;
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op->value = value;
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op->int_value = int_value;
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}
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/* Make OP describe an operand that must use rtx X, even if X is volatile. */
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inline void
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create_fixed_operand (class expand_operand *op, rtx x)
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{
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create_expand_operand (op, EXPAND_FIXED, x, VOIDmode, false);
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}
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/* Make OP describe an output operand that must have mode MODE.
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X, if nonnull, is a suggestion for where the output should be stored.
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It is OK for VALUE to be inconsistent with MODE, although it will just
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be ignored in that case. */
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inline void
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create_output_operand (class expand_operand *op, rtx x,
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machine_mode mode)
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{
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create_expand_operand (op, EXPAND_OUTPUT, x, mode, false);
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}
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/* Make OP describe an input operand that must have mode MODE and
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value VALUE; MODE cannot be VOIDmode. The backend may request that
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VALUE be copied into a different kind of rtx before being passed
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as an operand. */
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inline void
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create_input_operand (class expand_operand *op, rtx value,
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machine_mode mode)
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{
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create_expand_operand (op, EXPAND_INPUT, value, mode, false);
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}
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/* Like create_input_operand, except that VALUE must first be converted
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to mode MODE. UNSIGNED_P says whether VALUE is unsigned. */
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inline void
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create_convert_operand_to (class expand_operand *op, rtx value,
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machine_mode mode, bool unsigned_p)
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{
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create_expand_operand (op, EXPAND_CONVERT_TO, value, mode, unsigned_p);
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}
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/* Make OP describe an input operand that should have the same value
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as VALUE, after any mode conversion that the backend might request.
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If VALUE is a CONST_INT, it should be treated as having mode MODE.
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UNSIGNED_P says whether VALUE is unsigned.
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The conversion of VALUE can include a combination of numerical
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conversion (as for convert_modes) and duplicating a scalar to fill
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a vector (if VALUE is a scalar but the operand is a vector). */
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inline void
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create_convert_operand_from (class expand_operand *op, rtx value,
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machine_mode mode, bool unsigned_p)
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{
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create_expand_operand (op, EXPAND_CONVERT_FROM, value, mode, unsigned_p);
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}
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/* Make OP describe an input Pmode address operand. VALUE is the value
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of the address, but it may need to be converted to Pmode first. */
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inline void
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create_address_operand (class expand_operand *op, rtx value)
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{
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create_expand_operand (op, EXPAND_ADDRESS, value, Pmode, false);
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}
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extern void create_integer_operand (class expand_operand *, poly_int64);
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/* Passed to expand_simple_binop and expand_binop to say which options
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to try to use if the requested operation can't be open-coded on the
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requisite mode. Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using
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a library call. Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try
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using a wider mode. OPTAB_MUST_WIDEN says try widening and don't
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try anything else. */
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enum optab_methods
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{
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OPTAB_DIRECT,
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OPTAB_LIB,
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OPTAB_WIDEN,
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OPTAB_LIB_WIDEN,
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OPTAB_MUST_WIDEN
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};
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extern rtx expand_widen_pattern_expr (struct separate_ops *, rtx , rtx , rtx,
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rtx, int);
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extern rtx expand_ternary_op (machine_mode mode, optab ternary_optab,
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rtx op0, rtx op1, rtx op2, rtx target,
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int unsignedp);
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extern rtx simplify_expand_binop (machine_mode mode, optab binoptab,
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rtx op0, rtx op1, rtx target, int unsignedp,
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enum optab_methods methods);
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extern bool force_expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
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enum optab_methods);
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extern rtx expand_vector_broadcast (machine_mode, rtx);
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extern rtx expand_doubleword_divmod (machine_mode, rtx, rtx, rtx *, bool);
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/* Generate code for a simple binary or unary operation. "Simple" in
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this case means "can be unambiguously described by a (mode, code)
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pair and mapped to a single optab." */
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extern rtx expand_simple_binop (machine_mode, enum rtx_code, rtx,
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rtx, rtx, int, enum optab_methods);
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/* Expand a binary operation given optab and rtx operands. */
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extern rtx expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
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enum optab_methods);
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/* Expand a binary operation with both signed and unsigned forms. */
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extern rtx sign_expand_binop (machine_mode, optab, optab, rtx, rtx,
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rtx, int, enum optab_methods);
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/* Generate code to perform an operation on one operand with two results. */
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extern int expand_twoval_unop (optab, rtx, rtx, rtx, int);
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/* Generate code to perform an operation on two operands with two results. */
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extern int expand_twoval_binop (optab, rtx, rtx, rtx, rtx, int);
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/* Generate code to perform an operation on two operands with two
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results, using a library function. */
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extern bool expand_twoval_binop_libfunc (optab, rtx, rtx, rtx, rtx,
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enum rtx_code);
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extern rtx expand_simple_unop (machine_mode, enum rtx_code, rtx, rtx,
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int);
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/* Expand a unary arithmetic operation given optab rtx operand. */
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extern rtx expand_unop (machine_mode, optab, rtx, rtx, int);
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/* Expand the absolute value operation. */
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extern rtx expand_abs_nojump (machine_mode, rtx, rtx, int);
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extern rtx expand_abs (machine_mode, rtx, rtx, int, int);
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/* Expand the one's complement absolute value operation. */
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extern rtx expand_one_cmpl_abs_nojump (machine_mode, rtx, rtx);
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/* Expand the copysign operation. */
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extern rtx expand_copysign (rtx, rtx, rtx);
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/* Generate an instruction with a given INSN_CODE with an output and
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an input. */
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extern bool maybe_emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
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extern void emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
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/* Emit code to make a call to a constant function or a library call. */
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extern void emit_libcall_block (rtx_insn *, rtx, rtx, rtx);
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/* The various uses that a comparison can have; used by can_compare_p:
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jumps, conditional moves, store flag operations. */
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enum can_compare_purpose
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{
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ccp_jump,
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ccp_cmov,
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ccp_store_flag
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};
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/* Nonzero if a compare of mode MODE can be done straightforwardly
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(without splitting it into pieces). */
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extern int can_compare_p (enum rtx_code, machine_mode,
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enum can_compare_purpose);
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/* Return whether the backend can emit a vector comparison (vec_cmp/vec_cmpu)
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for code CODE, comparing operands of mode VALUE_MODE and producing a result
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with MASK_MODE. */
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extern bool can_vec_cmp_compare_p (enum rtx_code, machine_mode, machine_mode);
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/* Return whether the backend can emit a vector comparison (vcond/vcondu) for
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code CODE, comparing operands of mode CMP_OP_MODE and producing a result
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with VALUE_MODE. */
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extern bool can_vcond_compare_p (enum rtx_code, machine_mode, machine_mode);
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/* Return whether the backend can emit vector set instructions for inserting
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element into vector at variable index position. */
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extern bool can_vec_set_var_idx_p (machine_mode);
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extern rtx prepare_operand (enum insn_code, rtx, int, machine_mode,
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machine_mode, int);
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/* Emit a pair of rtl insns to compare two rtx's and to jump
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to a label if the comparison is true. */
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extern void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx,
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machine_mode, int, rtx,
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profile_probability prob
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= profile_probability::uninitialized ());
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extern void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx,
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machine_mode, int, tree, rtx,
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profile_probability prob
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= profile_probability::uninitialized ());
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/* Generate code to indirectly jump to a location given in the rtx LOC. */
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extern void emit_indirect_jump (rtx);
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#include "insn-config.h"
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#ifndef GCC_INSN_CONFIG_H
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#error "insn-config.h must be included before optabs.h"
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#endif
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/* Emit a conditional move operation. */
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rtx emit_conditional_move (rtx, rtx_comparison, rtx, rtx, machine_mode, int);
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rtx emit_conditional_move (rtx, rtx, rtx, rtx, rtx, machine_mode);
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/* Emit a conditional negate or bitwise complement operation. */
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rtx emit_conditional_neg_or_complement (rtx, rtx_code, machine_mode, rtx,
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rtx, rtx);
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rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, machine_mode,
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rtx, rtx, machine_mode, int);
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/* Create but don't emit one rtl instruction to perform certain operations.
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Modes must match; operands must meet the operation's predicates.
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Likewise for subtraction and for just copying. */
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extern rtx_insn *gen_add2_insn (rtx, rtx);
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extern rtx_insn *gen_add3_insn (rtx, rtx, rtx);
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extern int have_add2_insn (rtx, rtx);
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extern rtx_insn *gen_addptr3_insn (rtx, rtx, rtx);
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extern int have_addptr3_insn (rtx, rtx, rtx);
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extern rtx_insn *gen_sub2_insn (rtx, rtx);
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extern rtx_insn *gen_sub3_insn (rtx, rtx, rtx);
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extern int have_sub2_insn (rtx, rtx);
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/* Generate the body of an insn to extend Y (with mode MFROM)
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into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
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extern rtx_insn *gen_extend_insn (rtx, rtx, machine_mode, machine_mode, int);
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/* Generate code for a FLOAT_EXPR. */
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extern void expand_float (rtx, rtx, int);
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/* Generate code for a FIX_EXPR. */
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extern void expand_fix (rtx, rtx, int);
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/* Generate code for a FIXED_CONVERT_EXPR. */
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extern void expand_fixed_convert (rtx, rtx, int, int);
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/* Generate code for float to integral conversion. */
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extern bool expand_sfix_optab (rtx, rtx, convert_optab);
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/* Report whether the machine description contains an insn which can
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perform the operation described by CODE and MODE. */
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extern int have_insn_for (enum rtx_code, machine_mode);
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/* Generate a conditional trap instruction. */
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extern rtx_insn *gen_cond_trap (enum rtx_code, rtx, rtx, rtx);
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/* Generate code for VEC_PERM_EXPR. */
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extern rtx expand_vec_perm_var (machine_mode, rtx, rtx, rtx, rtx);
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extern rtx expand_vec_perm_const (machine_mode, rtx, rtx,
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const vec_perm_builder &, machine_mode, rtx);
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/* Generate code for vector comparison. */
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extern rtx expand_vec_cmp_expr (tree, tree, rtx);
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/* Generate code for VEC_SERIES_EXPR. */
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extern rtx expand_vec_series_expr (machine_mode, rtx, rtx, rtx);
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/* Generate code for MULT_HIGHPART_EXPR. */
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extern rtx expand_mult_highpart (machine_mode, rtx, rtx, rtx, bool);
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extern rtx expand_sync_lock_test_and_set (rtx, rtx, rtx);
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extern rtx expand_atomic_test_and_set (rtx, rtx, enum memmodel);
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extern rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel);
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extern bool expand_atomic_compare_and_swap (rtx *, rtx *, rtx, rtx, rtx, bool,
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enum memmodel, enum memmodel);
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/* Generate memory barriers. */
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extern void expand_mem_thread_fence (enum memmodel);
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extern void expand_mem_signal_fence (enum memmodel);
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rtx expand_atomic_load (rtx, rtx, enum memmodel);
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rtx expand_atomic_store (rtx, rtx, enum memmodel, bool);
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rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel,
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bool);
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extern void expand_asm_reg_clobber_mem_blockage (HARD_REG_SET);
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extern bool insn_operand_matches (enum insn_code icode, unsigned int opno,
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rtx operand);
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extern bool valid_multiword_target_p (rtx);
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extern void create_convert_operand_from_type (class expand_operand *op,
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rtx value, tree type);
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extern bool maybe_legitimize_operands (enum insn_code icode,
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unsigned int opno, unsigned int nops,
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class expand_operand *ops);
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extern rtx_insn *maybe_gen_insn (enum insn_code icode, unsigned int nops,
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class expand_operand *ops);
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extern bool maybe_expand_insn (enum insn_code icode, unsigned int nops,
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class expand_operand *ops);
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extern bool maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
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class expand_operand *ops);
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extern void expand_insn (enum insn_code icode, unsigned int nops,
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class expand_operand *ops);
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extern void expand_jump_insn (enum insn_code icode, unsigned int nops,
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class expand_operand *ops);
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extern enum rtx_code get_rtx_code_1 (enum tree_code tcode, bool unsignedp);
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extern enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp);
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extern rtx vector_compare_rtx (machine_mode cmp_mode, enum tree_code tcode,
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tree t_op0, tree t_op1, bool unsignedp,
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enum insn_code icode, unsigned int opno);
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#endif /* GCC_OPTABS_H */
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