528 lines
16 KiB
C++
528 lines
16 KiB
C++
/* Sets (bit vectors) of hard registers, and operations on them.
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Copyright (C) 1987-2023 Free Software Foundation, Inc.
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This file is part of GCC
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#ifndef GCC_HARD_REG_SET_H
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#define GCC_HARD_REG_SET_H
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#include "array-traits.h"
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/* Define the type of a set of hard registers. */
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/* HARD_REG_ELT_TYPE is a typedef of the unsigned integral type which
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will be used for hard reg sets, either alone or in an array.
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If HARD_REG_SET is a macro, its definition is HARD_REG_ELT_TYPE,
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and it has enough bits to represent all the target machine's hard
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registers. Otherwise, it is a typedef for a suitably sized array
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of HARD_REG_ELT_TYPEs. HARD_REG_SET_LONGS is defined as how many.
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Note that lots of code assumes that the first part of a regset is
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the same format as a HARD_REG_SET. To help make sure this is true,
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we only try the widest fast integer mode (HOST_WIDEST_FAST_INT)
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instead of all the smaller types. This approach loses only if
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there are very few registers and then only in the few cases where
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we have an array of HARD_REG_SETs, so it needn't be as complex as
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it used to be. */
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typedef unsigned HOST_WIDEST_FAST_INT HARD_REG_ELT_TYPE;
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#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT
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typedef HARD_REG_ELT_TYPE HARD_REG_SET;
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typedef const HARD_REG_SET const_hard_reg_set;
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#else
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#define HARD_REG_SET_LONGS \
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((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDEST_FAST_INT - 1) \
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/ HOST_BITS_PER_WIDEST_FAST_INT)
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struct HARD_REG_SET
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{
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HARD_REG_SET
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operator~ () const
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{
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HARD_REG_SET res;
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for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
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res.elts[i] = ~elts[i];
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return res;
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}
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HARD_REG_SET
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operator& (const HARD_REG_SET &other) const
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{
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HARD_REG_SET res;
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for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
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res.elts[i] = elts[i] & other.elts[i];
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return res;
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}
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HARD_REG_SET &
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operator&= (const HARD_REG_SET &other)
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{
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for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
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elts[i] &= other.elts[i];
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return *this;
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}
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HARD_REG_SET
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operator| (const HARD_REG_SET &other) const
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{
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HARD_REG_SET res;
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for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
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res.elts[i] = elts[i] | other.elts[i];
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return res;
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}
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HARD_REG_SET &
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operator|= (const HARD_REG_SET &other)
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{
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for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
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elts[i] |= other.elts[i];
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return *this;
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}
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bool
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operator== (const HARD_REG_SET &other) const
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{
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HARD_REG_ELT_TYPE bad = 0;
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for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
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bad |= (elts[i] ^ other.elts[i]);
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return bad == 0;
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}
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bool
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operator!= (const HARD_REG_SET &other) const
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{
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return !operator== (other);
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}
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HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS];
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};
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typedef const HARD_REG_SET &const_hard_reg_set;
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template<>
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struct array_traits<HARD_REG_SET>
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{
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typedef HARD_REG_ELT_TYPE element_type;
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static const bool has_constant_size = true;
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static const size_t constant_size = HARD_REG_SET_LONGS;
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static const element_type *base (const HARD_REG_SET &x) { return x.elts; }
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static size_t size (const HARD_REG_SET &) { return HARD_REG_SET_LONGS; }
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};
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#endif
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/* HARD_REG_SET wrapped into a structure, to make it possible to
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use HARD_REG_SET even in APIs that should not include
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hard-reg-set.h. */
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struct hard_reg_set_container
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{
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HARD_REG_SET set;
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};
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/* HARD_CONST is used to cast a constant to the appropriate type
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for use with a HARD_REG_SET. */
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#define HARD_CONST(X) ((HARD_REG_ELT_TYPE) (X))
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/* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
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to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
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All three take two arguments: the set and the register number.
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In the case where sets are arrays of longs, the first argument
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is actually a pointer to a long.
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Define two macros for initializing a set:
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CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
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These take just one argument.
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Also define:
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hard_reg_set_subset_p (X, Y), which returns true if X is a subset of Y.
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hard_reg_set_intersect_p (X, Y), which returns true if X and Y intersect.
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hard_reg_set_empty_p (X), which returns true if X is empty. */
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#define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT)
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#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT
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#define SET_HARD_REG_BIT(SET, BIT) \
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((SET) |= HARD_CONST (1) << (BIT))
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#define CLEAR_HARD_REG_BIT(SET, BIT) \
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((SET) &= ~(HARD_CONST (1) << (BIT)))
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#define TEST_HARD_REG_BIT(SET, BIT) \
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(!!((SET) & (HARD_CONST (1) << (BIT))))
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#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
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#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
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inline bool
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hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
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{
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return (x & ~y) == HARD_CONST (0);
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}
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inline bool
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hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
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{
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return (x & y) != HARD_CONST (0);
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}
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inline bool
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hard_reg_set_empty_p (const_hard_reg_set x)
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{
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return x == HARD_CONST (0);
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}
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#else
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inline void
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SET_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit)
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{
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set.elts[bit / UHOST_BITS_PER_WIDE_INT]
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|= HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT);
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}
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inline void
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CLEAR_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit)
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{
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set.elts[bit / UHOST_BITS_PER_WIDE_INT]
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&= ~(HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT));
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}
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inline bool
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TEST_HARD_REG_BIT (const_hard_reg_set set, unsigned int bit)
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{
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return (set.elts[bit / UHOST_BITS_PER_WIDE_INT]
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& (HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT)));
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}
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inline void
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CLEAR_HARD_REG_SET (HARD_REG_SET &set)
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{
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for (unsigned int i = 0; i < ARRAY_SIZE (set.elts); ++i)
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set.elts[i] = 0;
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}
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inline void
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SET_HARD_REG_SET (HARD_REG_SET &set)
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{
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for (unsigned int i = 0; i < ARRAY_SIZE (set.elts); ++i)
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set.elts[i] = -1;
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}
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inline bool
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hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
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{
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HARD_REG_ELT_TYPE bad = 0;
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for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
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bad |= (x.elts[i] & ~y.elts[i]);
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return bad == 0;
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}
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inline bool
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hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
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{
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HARD_REG_ELT_TYPE good = 0;
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for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
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good |= (x.elts[i] & y.elts[i]);
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return good != 0;
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}
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inline bool
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hard_reg_set_empty_p (const_hard_reg_set x)
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{
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HARD_REG_ELT_TYPE bad = 0;
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for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
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bad |= x.elts[i];
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return bad == 0;
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}
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#endif
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/* Iterator for hard register sets. */
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struct hard_reg_set_iterator
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{
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/* Pointer to the current element. */
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const HARD_REG_ELT_TYPE *pelt;
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/* The length of the set. */
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unsigned short length;
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/* Word within the current element. */
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unsigned short word_no;
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/* Contents of the actually processed word. When finding next bit
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it is shifted right, so that the actual bit is always the least
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significant bit of ACTUAL. */
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HARD_REG_ELT_TYPE bits;
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};
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#define HARD_REG_ELT_BITS UHOST_BITS_PER_WIDE_INT
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/* The implementation of the iterator functions is fully analogous to
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the bitmap iterators. */
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inline void
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hard_reg_set_iter_init (hard_reg_set_iterator *iter, const_hard_reg_set set,
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unsigned min, unsigned *regno)
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{
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#ifdef HARD_REG_SET_LONGS
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iter->pelt = set.elts;
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iter->length = HARD_REG_SET_LONGS;
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#else
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iter->pelt = &set;
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iter->length = 1;
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#endif
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iter->word_no = min / HARD_REG_ELT_BITS;
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if (iter->word_no < iter->length)
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{
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iter->bits = iter->pelt[iter->word_no];
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iter->bits >>= min % HARD_REG_ELT_BITS;
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/* This is required for correct search of the next bit. */
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min += !iter->bits;
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}
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*regno = min;
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}
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inline bool
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hard_reg_set_iter_set (hard_reg_set_iterator *iter, unsigned *regno)
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{
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while (1)
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{
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/* Return false when we're advanced past the end of the set. */
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if (iter->word_no >= iter->length)
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return false;
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if (iter->bits)
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{
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/* Find the correct bit and return it. */
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while (!(iter->bits & 1))
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{
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iter->bits >>= 1;
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*regno += 1;
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}
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return (*regno < FIRST_PSEUDO_REGISTER);
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}
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/* Round to the beginning of the next word. */
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*regno = (*regno + HARD_REG_ELT_BITS - 1);
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*regno -= *regno % HARD_REG_ELT_BITS;
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/* Find the next non-zero word. */
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while (++iter->word_no < iter->length)
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{
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iter->bits = iter->pelt[iter->word_no];
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if (iter->bits)
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break;
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*regno += HARD_REG_ELT_BITS;
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}
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}
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}
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inline void
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hard_reg_set_iter_next (hard_reg_set_iterator *iter, unsigned *regno)
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{
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iter->bits >>= 1;
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*regno += 1;
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}
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#define EXECUTE_IF_SET_IN_HARD_REG_SET(SET, MIN, REGNUM, ITER) \
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for (hard_reg_set_iter_init (&(ITER), (SET), (MIN), &(REGNUM)); \
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hard_reg_set_iter_set (&(ITER), &(REGNUM)); \
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hard_reg_set_iter_next (&(ITER), &(REGNUM)))
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/* Define some standard sets of registers. */
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/* Indexed by hard register number, contains 1 for registers
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that are being used for global register decls.
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These must be exempt from ordinary flow analysis
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and are also considered fixed. */
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extern char global_regs[FIRST_PSEUDO_REGISTER];
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extern HARD_REG_SET global_reg_set;
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class simplifiable_subreg;
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class subreg_shape;
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struct simplifiable_subregs_hasher : nofree_ptr_hash <simplifiable_subreg>
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{
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typedef const subreg_shape *compare_type;
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static inline hashval_t hash (const simplifiable_subreg *);
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static inline bool equal (const simplifiable_subreg *, const subreg_shape *);
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};
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struct target_hard_regs {
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void finalize ();
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/* The set of registers that actually exist on the current target. */
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HARD_REG_SET x_accessible_reg_set;
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/* The set of registers that should be considered to be register
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operands. It is a subset of x_accessible_reg_set. */
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HARD_REG_SET x_operand_reg_set;
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use (stack pointer, pc, frame pointer, etc.;.
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These are the registers that cannot be used to allocate
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a pseudo reg whose life does not cross calls. */
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char x_fixed_regs[FIRST_PSEUDO_REGISTER];
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/* The same info as a HARD_REG_SET. */
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HARD_REG_SET x_fixed_reg_set;
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/* Indexed by hard register number, contains 1 for registers
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that are fixed use or are clobbered by function calls.
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These are the registers that cannot be used to allocate
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a pseudo reg whose life crosses calls. */
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char x_call_used_regs[FIRST_PSEUDO_REGISTER];
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/* For targets that use reload rather than LRA, this is the set
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of registers that we are able to save and restore around calls
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(i.e. those for which we know a suitable mode and set of
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load/store instructions exist). For LRA targets it contains
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all registers.
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This is legacy information and should be removed if all targets
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switch to LRA. */
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HARD_REG_SET x_savable_regs;
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/* Contains registers that are fixed use -- i.e. in fixed_reg_set -- but
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only if they are not merely part of that set because they are global
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regs. Global regs that are not otherwise fixed can still take part
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in register allocation. */
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HARD_REG_SET x_fixed_nonglobal_reg_set;
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/* Contains 1 for registers that are set or clobbered by calls. */
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/* ??? Ideally, this would be just call_used_regs plus global_regs, but
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for someone's bright idea to have call_used_regs strictly include
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fixed_regs. Which leaves us guessing as to the set of fixed_regs
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that are actually preserved. We know for sure that those associated
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with the local stack frame are safe, but scant others. */
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HARD_REG_SET x_regs_invalidated_by_call;
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/* Table of register numbers in the order in which to try to use them. */
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int x_reg_alloc_order[FIRST_PSEUDO_REGISTER];
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/* The inverse of reg_alloc_order. */
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int x_inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
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/* For each reg class, a HARD_REG_SET saying which registers are in it. */
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HARD_REG_SET x_reg_class_contents[N_REG_CLASSES];
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/* For each reg class, a boolean saying whether the class contains only
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fixed registers. */
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bool x_class_only_fixed_regs[N_REG_CLASSES];
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/* For each reg class, number of regs it contains. */
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unsigned int x_reg_class_size[N_REG_CLASSES];
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/* For each reg class, table listing all the classes contained in it. */
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enum reg_class x_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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a largest reg class contained in their union. */
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enum reg_class x_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
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/* For each pair of reg classes,
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the smallest reg class that contains their union. */
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enum reg_class x_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
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/* Vector indexed by hardware reg giving its name. */
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const char *x_reg_names[FIRST_PSEUDO_REGISTER];
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/* Records which registers can form a particular subreg, with the subreg
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being identified by its outer mode, inner mode and offset. */
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hash_table <simplifiable_subregs_hasher> *x_simplifiable_subregs;
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};
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extern struct target_hard_regs default_target_hard_regs;
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#if SWITCHABLE_TARGET
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extern struct target_hard_regs *this_target_hard_regs;
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#else
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#define this_target_hard_regs (&default_target_hard_regs)
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#endif
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#define accessible_reg_set \
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(this_target_hard_regs->x_accessible_reg_set)
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#define operand_reg_set \
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(this_target_hard_regs->x_operand_reg_set)
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#define fixed_regs \
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(this_target_hard_regs->x_fixed_regs)
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#define fixed_reg_set \
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(this_target_hard_regs->x_fixed_reg_set)
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#define fixed_nonglobal_reg_set \
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(this_target_hard_regs->x_fixed_nonglobal_reg_set)
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#ifdef IN_TARGET_CODE
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#define call_used_regs \
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(this_target_hard_regs->x_call_used_regs)
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#endif
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#define savable_regs \
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(this_target_hard_regs->x_savable_regs)
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#ifdef IN_TARGET_CODE
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#define regs_invalidated_by_call \
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(this_target_hard_regs->x_regs_invalidated_by_call)
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#define call_used_or_fixed_regs \
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(regs_invalidated_by_call | fixed_reg_set)
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#endif
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#define reg_alloc_order \
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(this_target_hard_regs->x_reg_alloc_order)
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#define inv_reg_alloc_order \
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(this_target_hard_regs->x_inv_reg_alloc_order)
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|
#define reg_class_contents \
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(this_target_hard_regs->x_reg_class_contents)
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|
#define class_only_fixed_regs \
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|
(this_target_hard_regs->x_class_only_fixed_regs)
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|
#define reg_class_size \
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|
(this_target_hard_regs->x_reg_class_size)
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|
#define reg_class_subclasses \
|
|
(this_target_hard_regs->x_reg_class_subclasses)
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|
#define reg_class_subunion \
|
|
(this_target_hard_regs->x_reg_class_subunion)
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|
#define reg_class_superunion \
|
|
(this_target_hard_regs->x_reg_class_superunion)
|
|
#define reg_names \
|
|
(this_target_hard_regs->x_reg_names)
|
|
|
|
/* Vector indexed by reg class giving its name. */
|
|
|
|
extern const char * reg_class_names[];
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|
|
|
/* Given a hard REGN a FROM mode and a TO mode, return true if
|
|
REGN can change from mode FROM to mode TO. */
|
|
#define REG_CAN_CHANGE_MODE_P(REGN, FROM, TO) \
|
|
(targetm.can_change_mode_class (FROM, TO, REGNO_REG_CLASS (REGN)))
|
|
|
|
#ifdef IN_TARGET_CODE
|
|
/* Return true if register REGNO is either fixed or call-used
|
|
(aka call-clobbered). */
|
|
|
|
inline bool
|
|
call_used_or_fixed_reg_p (unsigned int regno)
|
|
{
|
|
return fixed_regs[regno] || this_target_hard_regs->x_call_used_regs[regno];
|
|
}
|
|
#endif
|
|
|
|
#endif /* ! GCC_HARD_REG_SET_H */
|