122 lines
3.9 KiB
C
122 lines
3.9 KiB
C
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/* Copyright (C) 2003-2023 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Implemented from the specification included in the Intel C++ Compiler
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User Guide and Reference, version 9.0. */
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#ifndef _PMMINTRIN_H_INCLUDED
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#define _PMMINTRIN_H_INCLUDED
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/* We need definitions from the SSE2 and SSE header files*/
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#include <emmintrin.h>
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#include <mwaitintrin.h>
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#ifndef __SSE3__
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#pragma GCC push_options
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#pragma GCC target("sse3")
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#define __DISABLE_SSE3__
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#endif /* __SSE3__ */
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/* Additional bits in the MXCSR. */
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#define _MM_DENORMALS_ZERO_MASK 0x0040
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#define _MM_DENORMALS_ZERO_ON 0x0040
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#define _MM_DENORMALS_ZERO_OFF 0x0000
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#define _MM_SET_DENORMALS_ZERO_MODE(mode) \
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_mm_setcsr ((_mm_getcsr () & ~_MM_DENORMALS_ZERO_MASK) | (mode))
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#define _MM_GET_DENORMALS_ZERO_MODE() \
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(_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
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extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_addsub_ps (__m128 __X, __m128 __Y)
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{
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return (__m128) __builtin_ia32_addsubps ((__v4sf)__X, (__v4sf)__Y);
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}
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extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_hadd_ps (__m128 __X, __m128 __Y)
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{
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return (__m128) __builtin_ia32_haddps ((__v4sf)__X, (__v4sf)__Y);
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}
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extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_hsub_ps (__m128 __X, __m128 __Y)
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{
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return (__m128) __builtin_ia32_hsubps ((__v4sf)__X, (__v4sf)__Y);
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}
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extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_movehdup_ps (__m128 __X)
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{
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return (__m128) __builtin_ia32_movshdup ((__v4sf)__X);
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}
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extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_moveldup_ps (__m128 __X)
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{
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return (__m128) __builtin_ia32_movsldup ((__v4sf)__X);
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}
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extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_addsub_pd (__m128d __X, __m128d __Y)
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{
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return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
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}
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extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_hadd_pd (__m128d __X, __m128d __Y)
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{
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return (__m128d) __builtin_ia32_haddpd ((__v2df)__X, (__v2df)__Y);
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}
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extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_hsub_pd (__m128d __X, __m128d __Y)
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{
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return (__m128d) __builtin_ia32_hsubpd ((__v2df)__X, (__v2df)__Y);
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}
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extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_loaddup_pd (double const *__P)
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{
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return _mm_load1_pd (__P);
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}
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extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_movedup_pd (__m128d __X)
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{
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return _mm_shuffle_pd (__X, __X, _MM_SHUFFLE2 (0,0));
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}
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extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_lddqu_si128 (__m128i const *__P)
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{
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return (__m128i) __builtin_ia32_lddqu ((char const *)__P);
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}
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#ifdef __DISABLE_SSE3__
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#undef __DISABLE_SSE3__
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#pragma GCC pop_options
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#endif /* __DISABLE_SSE3__ */
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#endif /* _PMMINTRIN_H_INCLUDED */
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