470 lines
11 KiB
C
470 lines
11 KiB
C
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/* Generated automatically by the program `genconstants'
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from the machine description file `md'. */
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#ifndef GCC_INSN_CONSTANTS_H
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#define GCC_INSN_CONSTANTS_H
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#define SI_REG 4
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#define XMM13_REG 49
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#define PPERM_SIGN 0xc0
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#define XMM10_REG 46
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#define XMM17_REG 53
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#define COM_FALSE_P 3
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#define R13_REG 41
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#define XMM6_REG 26
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#define FPSR_REG 18
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#define XMM18_REG 54
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#define R10_REG 38
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#define XMM3_REG 23
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#define ST5_REG 13
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#define MM6_REG 34
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#define AX_REG 0
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#define XMM0_REG 20
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#define DI_REG 5
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#define MM3_REG 31
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#define MASK7_REG 75
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#define ROUND_SAE 8
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#define ROUND_NEAREST_INT 0
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#define PPERM_ZERO 0x80
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#define MM0_REG 28
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#define CX_REG 2
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#define MASK4_REG 72
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#define XMM27_REG 63
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#define R9_REG 37
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#define ABI_DEFAULT 0
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#define MASK1_REG 69
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#define XMM24_REG 60
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#define MM2_REG 30
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#define XMM15_REG 51
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#define NO_ROUND 4
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#define XMM30_REG 66
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#define PPERM_SRC1 0x00
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#define PPERM_SRC2 0x10
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#define XMM12_REG 48
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#define R15_REG 43
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#define ROUND_NO_EXC 0x8
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#define PCOM_FALSE 0
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#define XMM5_REG 25
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#define R12_REG 40
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#define R8_REG 36
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#define ST7_REG 15
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#define MASK2_REG 70
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#define PPERM_REVERSE 0x40
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#define BP_REG 6
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#define XMM2_REG 22
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#define PCOM_TRUE 1
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#define ST4_REG 12
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#define MM5_REG 33
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#define ROUND_TRUNC 0x3
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#define XMM21_REG 57
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#define PPERM_SRC 0x00
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#define ST1_REG 9
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#define MASK6_REG 74
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#define XMM8_REG 44
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#define ROUND_ROUNDEVEN 0x0
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#define XMM9_REG 45
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#define MASK3_REG 71
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#define XMM26_REG 62
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#define ROUND_MXCSR 0x4
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#define PPERM_ONES 0xa0
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#define ROUND_ZERO 3
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#define FIRST_PSEUDO_REG 76
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#define ROUND_FLOOR 0x1
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#define PPERM_INV_SIGN 0xe0
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#define XMM23_REG 59
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#define ROUND_NEG_INF 1
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#define XMM14_REG 50
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#define XMM25_REG 61
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#define COM_FALSE_S 2
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#define BX_REG 3
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#define XMM20_REG 56
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#define XMM11_REG 47
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#define FRAME_REG 19
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#define PPERM_INVERT 0x20
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#define PPERM_REV_INV 0x60
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#define R14_REG 42
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#define XMM7_REG 27
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#define ROUND_CEIL 0x2
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#define ABI_VZEROUPPER 1
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#define COM_TRUE_P 5
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#define COM_TRUE_S 4
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#define R11_REG 39
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#define XMM4_REG 24
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#define ST6_REG 14
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#define MM7_REG 35
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#define SP_REG 7
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#define ST2_REG 10
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#define ARGP_REG 16
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#define MASK0_REG 68
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#define XMM1_REG 21
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#define XMM29_REG 65
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#define ST3_REG 11
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#define MM4_REG 32
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#define ST0_REG 8
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#define MM1_REG 29
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#define MASK5_REG 73
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#define ROUND_POS_INF 2
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#define XMM28_REG 64
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#define XMM19_REG 55
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#define ABI_UNKNOWN 2
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#define FLAGS_REG 17
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#define DX_REG 1
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#define XMM16_REG 52
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#define XMM31_REG 67
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#define XMM22_REG 58
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enum unspec {
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UNSPEC_GOT = 0,
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UNSPEC_GOTOFF = 1,
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UNSPEC_GOTPCREL = 2,
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UNSPEC_GOTTPOFF = 3,
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UNSPEC_TPOFF = 4,
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UNSPEC_NTPOFF = 5,
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UNSPEC_DTPOFF = 6,
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UNSPEC_GOTNTPOFF = 7,
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UNSPEC_INDNTPOFF = 8,
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UNSPEC_PLTOFF = 9,
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UNSPEC_MACHOPIC_OFFSET = 10,
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UNSPEC_PCREL = 11,
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UNSPEC_SIZEOF = 12,
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UNSPEC_STACK_ALLOC = 13,
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UNSPEC_SET_GOT = 14,
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UNSPEC_SET_RIP = 15,
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UNSPEC_SET_GOT_OFFSET = 16,
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UNSPEC_MEMORY_BLOCKAGE = 17,
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UNSPEC_PROBE_STACK = 18,
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UNSPEC_TP = 19,
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UNSPEC_TLS_GD = 20,
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UNSPEC_TLS_LD_BASE = 21,
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UNSPEC_TLSDESC = 22,
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UNSPEC_TLS_IE_SUN = 23,
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UNSPEC_SCAS = 24,
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UNSPEC_FNSTSW = 25,
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UNSPEC_SAHF = 26,
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UNSPEC_NOTRAP = 27,
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UNSPEC_PARITY = 28,
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UNSPEC_FSTCW = 29,
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UNSPEC_REP = 30,
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UNSPEC_LD_MPIC = 31,
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UNSPEC_TRUNC_NOOP = 32,
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UNSPEC_DIV_ALREADY_SPLIT = 33,
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UNSPEC_PAUSE = 34,
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UNSPEC_LEA_ADDR = 35,
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UNSPEC_XBEGIN_ABORT = 36,
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UNSPEC_STOS = 37,
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UNSPEC_PEEPSIB = 38,
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UNSPEC_INSN_FALSE_DEP = 39,
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UNSPEC_SBB = 40,
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UNSPEC_CC_NE = 41,
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UNSPEC_FIX_NOTRUNC = 42,
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UNSPEC_MASKMOV = 43,
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UNSPEC_MOVCC_MASK = 44,
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UNSPEC_MOVMSK = 45,
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UNSPEC_BLENDV = 46,
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UNSPEC_PSHUFB = 47,
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UNSPEC_XOP_PERMUTE = 48,
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UNSPEC_RCP = 49,
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UNSPEC_RSQRT = 50,
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UNSPEC_PSADBW = 51,
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UNSPEC_SCALEF = 52,
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UNSPEC_PCMP = 53,
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UNSPEC_CVTBFSF = 54,
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UNSPEC_IEEE_MIN = 55,
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UNSPEC_IEEE_MAX = 56,
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UNSPEC_SIN = 57,
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UNSPEC_COS = 58,
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UNSPEC_FPATAN = 59,
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UNSPEC_FYL2X = 60,
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UNSPEC_FYL2XP1 = 61,
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UNSPEC_FRNDINT = 62,
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UNSPEC_FIST = 63,
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UNSPEC_F2XM1 = 64,
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UNSPEC_TAN = 65,
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UNSPEC_FXAM = 66,
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UNSPEC_FRNDINT_ROUNDEVEN = 67,
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UNSPEC_FRNDINT_FLOOR = 68,
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UNSPEC_FRNDINT_CEIL = 69,
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UNSPEC_FRNDINT_TRUNC = 70,
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UNSPEC_FIST_FLOOR = 71,
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UNSPEC_FIST_CEIL = 72,
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UNSPEC_SINCOS_COS = 73,
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UNSPEC_SINCOS_SIN = 74,
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UNSPEC_XTRACT_FRACT = 75,
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UNSPEC_XTRACT_EXP = 76,
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UNSPEC_FSCALE_FRACT = 77,
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UNSPEC_FSCALE_EXP = 78,
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UNSPEC_FPREM_F = 79,
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UNSPEC_FPREM_U = 80,
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UNSPEC_FPREM1_F = 81,
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UNSPEC_FPREM1_U = 82,
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UNSPEC_C2_FLAG = 83,
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UNSPEC_FXAM_MEM = 84,
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UNSPEC_SP_SET = 85,
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UNSPEC_SP_TEST = 86,
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UNSPEC_ROUND = 87,
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UNSPEC_CRC32 = 88,
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UNSPEC_LZCNT = 89,
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UNSPEC_TZCNT = 90,
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UNSPEC_BEXTR = 91,
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UNSPEC_PDEP = 92,
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UNSPEC_PEXT = 93,
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UNSPEC_INTERRUPT_RETURN = 94,
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UNSPEC_MOVDIRI = 95,
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UNSPEC_MOVDIR64B = 96,
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UNSPEC_CALLEE_ABI = 97,
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UNSPEC_MOVNTQ = 98,
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UNSPEC_PFRCP = 99,
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UNSPEC_PFRCPIT1 = 100,
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UNSPEC_PFRCPIT2 = 101,
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UNSPEC_PFRSQRT = 102,
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UNSPEC_PFRSQIT1 = 103,
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UNSPEC_MOVNT = 104,
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UNSPEC_MOVDI_TO_SSE = 105,
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UNSPEC_LDDQU = 106,
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UNSPEC_PSIGN = 107,
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UNSPEC_PALIGNR = 108,
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UNSPEC_EXTRQI = 109,
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UNSPEC_EXTRQ = 110,
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UNSPEC_INSERTQI = 111,
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UNSPEC_INSERTQ = 112,
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UNSPEC_INSERTPS = 113,
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UNSPEC_DP = 114,
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UNSPEC_MOVNTDQA = 115,
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UNSPEC_MPSADBW = 116,
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UNSPEC_PHMINPOSUW = 117,
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UNSPEC_PTEST = 118,
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UNSPEC_PCMPESTR = 119,
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UNSPEC_PCMPISTR = 120,
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UNSPEC_FMADDSUB = 121,
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UNSPEC_XOP_UNSIGNED_CMP = 122,
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UNSPEC_XOP_TRUEFALSE = 123,
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UNSPEC_FRCZ = 124,
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UNSPEC_AESENC = 125,
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UNSPEC_AESENCLAST = 126,
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UNSPEC_AESDEC = 127,
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UNSPEC_AESDECLAST = 128,
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UNSPEC_AESIMC = 129,
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UNSPEC_AESKEYGENASSIST = 130,
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UNSPEC_PCLMUL = 131,
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UNSPEC_VPERMIL = 132,
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UNSPEC_VPERMIL2 = 133,
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UNSPEC_VPERMIL2F128 = 134,
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UNSPEC_CAST = 135,
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UNSPEC_VTESTP = 136,
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UNSPEC_VCVTPH2PS = 137,
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UNSPEC_VCVTPS2PH = 138,
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UNSPEC_VPERMVAR = 139,
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UNSPEC_VPERMTI = 140,
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UNSPEC_GATHER = 141,
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UNSPEC_VSIBADDR = 142,
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UNSPEC_VPERMT2 = 143,
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UNSPEC_UNSIGNED_FIX_NOTRUNC = 144,
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UNSPEC_UNSIGNED_PCMP = 145,
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UNSPEC_TESTM = 146,
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UNSPEC_TESTNM = 147,
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UNSPEC_SCATTER = 148,
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UNSPEC_RCP14 = 149,
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UNSPEC_RSQRT14 = 150,
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UNSPEC_FIXUPIMM = 151,
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UNSPEC_VTERNLOG = 152,
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UNSPEC_GETEXP = 153,
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UNSPEC_GETMANT = 154,
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UNSPEC_ALIGN = 155,
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UNSPEC_CONFLICT = 156,
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UNSPEC_COMPRESS = 157,
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UNSPEC_COMPRESS_STORE = 158,
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UNSPEC_EXPAND = 159,
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UNSPEC_MASKOP = 160,
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UNSPEC_KORTEST = 161,
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UNSPEC_KTEST = 162,
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UNSPEC_MASKLOAD = 163,
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UNSPEC_EMBEDDED_ROUNDING = 164,
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UNSPEC_GATHER_PREFETCH = 165,
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UNSPEC_SCATTER_PREFETCH = 166,
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UNSPEC_EXP2 = 167,
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UNSPEC_RCP28 = 168,
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UNSPEC_RSQRT28 = 169,
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UNSPEC_SHA1MSG1 = 170,
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UNSPEC_SHA1MSG2 = 171,
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UNSPEC_SHA1NEXTE = 172,
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UNSPEC_SHA1RNDS4 = 173,
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UNSPEC_SHA256MSG1 = 174,
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UNSPEC_SHA256MSG2 = 175,
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UNSPEC_SHA256RNDS2 = 176,
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UNSPEC_DBPSADBW = 177,
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UNSPEC_PMADDUBSW512 = 178,
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UNSPEC_PMADDWD512 = 179,
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UNSPEC_PSHUFHW = 180,
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UNSPEC_PSHUFLW = 181,
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UNSPEC_CVTINT2MASK = 182,
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UNSPEC_REDUCE = 183,
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UNSPEC_FPCLASS = 184,
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UNSPEC_RANGE = 185,
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UNSPEC_VPMADD52LUQ = 186,
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UNSPEC_VPMADD52HUQ = 187,
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UNSPEC_VPMULTISHIFT = 188,
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UNSPEC_VP4FMADD = 189,
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UNSPEC_VP4FNMADD = 190,
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UNSPEC_VP4DPWSSD = 191,
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UNSPEC_VP4DPWSSDS = 192,
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UNSPEC_GF2P8AFFINEINV = 193,
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UNSPEC_GF2P8AFFINE = 194,
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UNSPEC_GF2P8MUL = 195,
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UNSPEC_VPSHLD = 196,
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UNSPEC_VPSHRD = 197,
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UNSPEC_VPSHRDV = 198,
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UNSPEC_VPSHLDV = 199,
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UNSPEC_VPDPBUSD = 200,
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UNSPEC_VPDPBUSDS = 201,
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UNSPEC_VPDPWSSD = 202,
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UNSPEC_VPDPWSSDS = 203,
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UNSPEC_VAESDEC = 204,
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UNSPEC_VAESDECLAST = 205,
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UNSPEC_VAESENC = 206,
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UNSPEC_VAESENCLAST = 207,
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UNSPEC_VPCLMULQDQ = 208,
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UNSPEC_VPSHUFBIT = 209,
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UNSPEC_VP2INTERSECT = 210,
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UNSPEC_VDPBF16PS = 211,
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UNSPEC_COMPLEX_FMA = 212,
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UNSPEC_COMPLEX_FMA_PAIR = 213,
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UNSPEC_COMPLEX_FCMA = 214,
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UNSPEC_COMPLEX_FCMA_PAIR = 215,
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UNSPEC_COMPLEX_FMUL = 216,
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UNSPEC_COMPLEX_FCMUL = 217,
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UNSPEC_COMPLEX_MASK = 218,
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UNSPEC_VPDPBSSD = 219,
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UNSPEC_VPDPBSSDS = 220,
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UNSPEC_VPDPBSUD = 221,
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UNSPEC_VPDPBSUDS = 222,
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UNSPEC_VPDPBUUD = 223,
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UNSPEC_VPDPBUUDS = 224,
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UNSPEC_LFENCE = 225,
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UNSPEC_SFENCE = 226,
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UNSPEC_MFENCE = 227,
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UNSPEC_FILD_ATOMIC = 228,
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UNSPEC_FIST_ATOMIC = 229,
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UNSPEC_LDX_ATOMIC = 230,
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UNSPEC_STX_ATOMIC = 231,
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UNSPEC_LDA = 232,
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UNSPEC_STA = 233
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};
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#define NUM_UNSPEC_VALUES 234
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extern const char *const unspec_strings[];
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enum unspecv {
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UNSPECV_UD2 = 0,
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UNSPECV_BLOCKAGE = 1,
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UNSPECV_STACK_PROBE = 2,
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UNSPECV_PROBE_STACK_RANGE = 3,
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UNSPECV_ALIGN = 4,
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UNSPECV_PROLOGUE_USE = 5,
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UNSPECV_SPLIT_STACK_RETURN = 6,
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UNSPECV_CLD = 7,
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UNSPECV_NOPS = 8,
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UNSPECV_RDTSC = 9,
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UNSPECV_RDTSCP = 10,
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UNSPECV_RDPMC = 11,
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UNSPECV_LLWP_INTRINSIC = 12,
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UNSPECV_SLWP_INTRINSIC = 13,
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UNSPECV_LWPVAL_INTRINSIC = 14,
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UNSPECV_LWPINS_INTRINSIC = 15,
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UNSPECV_RDFSBASE = 16,
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UNSPECV_RDGSBASE = 17,
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UNSPECV_WRFSBASE = 18,
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UNSPECV_WRGSBASE = 19,
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UNSPECV_FXSAVE = 20,
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UNSPECV_FXRSTOR = 21,
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UNSPECV_FXSAVE64 = 22,
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UNSPECV_FXRSTOR64 = 23,
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UNSPECV_XSAVE = 24,
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UNSPECV_XRSTOR = 25,
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UNSPECV_XSAVE64 = 26,
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UNSPECV_XRSTOR64 = 27,
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UNSPECV_XSAVEOPT = 28,
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UNSPECV_XSAVEOPT64 = 29,
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UNSPECV_XSAVES = 30,
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UNSPECV_XRSTORS = 31,
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UNSPECV_XSAVES64 = 32,
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UNSPECV_XRSTORS64 = 33,
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UNSPECV_XSAVEC = 34,
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UNSPECV_XSAVEC64 = 35,
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UNSPECV_XGETBV = 36,
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UNSPECV_XSETBV = 37,
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UNSPECV_WBINVD = 38,
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UNSPECV_WBNOINVD = 39,
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UNSPECV_FNSTENV = 40,
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UNSPECV_FLDENV = 41,
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UNSPECV_FNSTSW = 42,
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UNSPECV_FNCLEX = 43,
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UNSPECV_RDRAND = 44,
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UNSPECV_RDSEED = 45,
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UNSPECV_XBEGIN = 46,
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UNSPECV_XEND = 47,
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UNSPECV_XABORT = 48,
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UNSPECV_XTEST = 49,
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UNSPECV_NLGR = 50,
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UNSPECV_CLWB = 51,
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UNSPECV_CLFLUSHOPT = 52,
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UNSPECV_MONITORX = 53,
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UNSPECV_MWAITX = 54,
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UNSPECV_CLZERO = 55,
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UNSPECV_PKU = 56,
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UNSPECV_RDPID = 57,
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UNSPECV_NOP_ENDBR = 58,
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UNSPECV_NOP_RDSSP = 59,
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UNSPECV_INCSSP = 60,
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UNSPECV_SAVEPREVSSP = 61,
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UNSPECV_RSTORSSP = 62,
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UNSPECV_WRSS = 63,
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|
UNSPECV_WRUSS = 64,
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UNSPECV_SETSSBSY = 65,
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UNSPECV_CLRSSBSY = 66,
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UNSPECV_XSUSLDTRK = 67,
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UNSPECV_XRESLDTRK = 68,
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UNSPECV_UMWAIT = 69,
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UNSPECV_UMONITOR = 70,
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UNSPECV_TPAUSE = 71,
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|
UNSPECV_CLUI = 72,
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|
UNSPECV_STUI = 73,
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|
UNSPECV_TESTUI = 74,
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|
UNSPECV_SENDUIPI = 75,
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|
UNSPECV_CLDEMOTE = 76,
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|
UNSPECV_SPECULATION_BARRIER = 77,
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|
UNSPECV_PTWRITE = 78,
|
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|
UNSPECV_ENQCMD = 79,
|
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|
UNSPECV_ENQCMDS = 80,
|
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|
UNSPECV_SERIALIZE = 81,
|
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|
UNSPECV_PATCHABLE_AREA = 82,
|
||
|
UNSPECV_HRESET = 83,
|
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|
UNSPECV_PREFETCHI = 84,
|
||
|
UNSPECV_EMMS = 85,
|
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|
UNSPECV_FEMMS = 86,
|
||
|
UNSPECV_LDMXCSR = 87,
|
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|
UNSPECV_STMXCSR = 88,
|
||
|
UNSPECV_CLFLUSH = 89,
|
||
|
UNSPECV_MONITOR = 90,
|
||
|
UNSPECV_MWAIT = 91,
|
||
|
UNSPECV_VZEROALL = 92,
|
||
|
UNSPECV_LOADIWKEY = 93,
|
||
|
UNSPECV_AESDEC128KLU8 = 94,
|
||
|
UNSPECV_AESENC128KLU8 = 95,
|
||
|
UNSPECV_AESDEC256KLU8 = 96,
|
||
|
UNSPECV_AESENC256KLU8 = 97,
|
||
|
UNSPECV_AESDECWIDE128KLU8 = 98,
|
||
|
UNSPECV_AESENCWIDE128KLU8 = 99,
|
||
|
UNSPECV_AESDECWIDE256KLU8 = 100,
|
||
|
UNSPECV_AESENCWIDE256KLU8 = 101,
|
||
|
UNSPECV_ENCODEKEY128U32 = 102,
|
||
|
UNSPECV_ENCODEKEY256U32 = 103,
|
||
|
UNSPECV_CMPXCHG = 104,
|
||
|
UNSPECV_XCHG = 105,
|
||
|
UNSPECV_LOCK = 106,
|
||
|
UNSPECV_CMPCCXADD = 107,
|
||
|
UNSPECV_RAOINT = 108
|
||
|
};
|
||
|
#define NUM_UNSPECV_VALUES 109
|
||
|
extern const char *const unspecv_strings[];
|
||
|
|
||
|
#endif /* GCC_INSN_CONSTANTS_H */
|