358 lines
11 KiB
C
358 lines
11 KiB
C
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/* Generated automatically by the program `genattr'
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from the machine description file `md'. */
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#ifndef GCC_INSN_ATTR_H
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#define GCC_INSN_ATTR_H
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#include "insn-attr-common.h"
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#define HAVE_ATTR_cpu 1
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extern enum attr_cpu get_attr_cpu (void);
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#define HAVE_ATTR_type 1
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extern enum attr_type get_attr_type (rtx_insn *);
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#define HAVE_ATTR_mode 1
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extern enum attr_mode get_attr_mode (rtx_insn *);
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#define HAVE_ATTR_unit 1
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extern enum attr_unit get_attr_unit (rtx_insn *);
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#define HAVE_ATTR_length_immediate 1
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extern int get_attr_length_immediate (rtx_insn *);
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#define HAVE_ATTR_length_address 1
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extern int get_attr_length_address (rtx_insn *);
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#define HAVE_ATTR_prefix_data16 1
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extern int get_attr_prefix_data16 (rtx_insn *);
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#define HAVE_ATTR_prefix_rep 1
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extern int get_attr_prefix_rep (rtx_insn *);
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#define HAVE_ATTR_prefix_0f 1
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extern int get_attr_prefix_0f (rtx_insn *);
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#define HAVE_ATTR_prefix_rex 1
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extern int get_attr_prefix_rex (rtx_insn *);
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#define HAVE_ATTR_prefix_extra 1
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extern int get_attr_prefix_extra (rtx_insn *);
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#define HAVE_ATTR_prefix 1
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extern enum attr_prefix get_attr_prefix (rtx_insn *);
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#define HAVE_ATTR_prefix_vex_w 1
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extern int get_attr_prefix_vex_w (rtx_insn *);
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#define HAVE_ATTR_length_vex 1
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extern int get_attr_length_vex (rtx_insn *);
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#define HAVE_ATTR_length_evex 1
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extern int get_attr_length_evex (rtx_insn *);
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#define HAVE_ATTR_modrm 1
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extern int get_attr_modrm (rtx_insn *);
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#define HAVE_ATTR_length 1
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extern int get_attr_length (rtx_insn *);
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extern void shorten_branches (rtx_insn *);
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extern int insn_default_length (rtx_insn *);
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extern int insn_min_length (rtx_insn *);
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extern int insn_variable_length_p (rtx_insn *);
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extern int insn_current_length (rtx_insn *);
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#include "insn-addr.h"
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#define HAVE_ATTR_memory 1
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extern enum attr_memory get_attr_memory (rtx_insn *);
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#define HAVE_ATTR_imm_disp 1
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extern enum attr_imm_disp get_attr_imm_disp (rtx_insn *);
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#define HAVE_ATTR_fp_int_src 1
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extern enum attr_fp_int_src get_attr_fp_int_src (rtx_insn *);
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#define HAVE_ATTR_i387_cw 1
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extern enum attr_i387_cw get_attr_i387_cw (rtx_insn *);
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#define HAVE_ATTR_avx_partial_xmm_update 1
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extern enum attr_avx_partial_xmm_update get_attr_avx_partial_xmm_update (rtx_insn *);
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#define HAVE_ATTR_use_carry 1
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extern enum attr_use_carry get_attr_use_carry (rtx_insn *);
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#define HAVE_ATTR_movu 1
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extern enum attr_movu get_attr_movu (rtx_insn *);
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#define HAVE_ATTR_isa 1
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extern enum attr_isa get_attr_isa (rtx_insn *);
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#define HAVE_ATTR_mmx_isa 1
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extern enum attr_mmx_isa get_attr_mmx_isa (rtx_insn *);
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#define HAVE_ATTR_enabled 1
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extern int get_attr_enabled (rtx_insn *);
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#define HAVE_ATTR_preferred_for_size 1
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extern int get_attr_preferred_for_size (rtx_insn *);
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#define HAVE_ATTR_preferred_for_speed 1
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extern int get_attr_preferred_for_speed (rtx_insn *);
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#define HAVE_ATTR_pent_prefix 1
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extern enum attr_pent_prefix get_attr_pent_prefix (rtx_insn *);
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#define HAVE_ATTR_pent_pair 1
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extern enum attr_pent_pair get_attr_pent_pair (rtx_insn *);
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#define HAVE_ATTR_athlon_decode 1
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extern enum attr_athlon_decode get_attr_athlon_decode (rtx_insn *);
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#define HAVE_ATTR_amdfam10_decode 1
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extern enum attr_amdfam10_decode get_attr_amdfam10_decode (rtx_insn *);
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#define HAVE_ATTR_bdver1_decode 1
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extern enum attr_bdver1_decode get_attr_bdver1_decode (rtx_insn *);
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#define HAVE_ATTR_btver2_decode 1
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extern enum attr_btver2_decode get_attr_btver2_decode (rtx_insn *);
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#define HAVE_ATTR_btver2_sse_attr 1
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extern enum attr_btver2_sse_attr get_attr_btver2_sse_attr (rtx_insn *);
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#define HAVE_ATTR_znver1_decode 1
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extern enum attr_znver1_decode get_attr_znver1_decode (rtx_insn *);
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#define HAVE_ATTR_znver4_decode 1
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extern enum attr_znver4_decode get_attr_znver4_decode (rtx_insn *);
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#define HAVE_ATTR_atom_unit 1
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extern enum attr_atom_unit get_attr_atom_unit (rtx_insn *);
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#define HAVE_ATTR_atom_sse_attr 1
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extern enum attr_atom_sse_attr get_attr_atom_sse_attr (rtx_insn *);
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#define HAVE_ATTR_i7_domain 1
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extern enum attr_i7_domain get_attr_i7_domain (rtx_insn *);
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#define HAVE_ATTR_hsw_domain 1
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extern enum attr_hsw_domain get_attr_hsw_domain (rtx_insn *);
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#define HAVE_ATTR_unord_subst 1
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extern enum attr_unord_subst get_attr_unord_subst (rtx_insn *);
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#define HAVE_ATTR_mask 1
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extern enum attr_mask get_attr_mask (rtx_insn *);
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#define HAVE_ATTR_maskc 1
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extern enum attr_maskc get_attr_maskc (rtx_insn *);
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#define HAVE_ATTR_merge_mask 1
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extern enum attr_merge_mask get_attr_merge_mask (rtx_insn *);
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#define HAVE_ATTR_mask_scalar_merge 1
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extern enum attr_mask_scalar_merge get_attr_mask_scalar_merge (rtx_insn *);
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#define HAVE_ATTR_sd 1
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extern enum attr_sd get_attr_sd (rtx_insn *);
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#define HAVE_ATTR_maskz_scalar 1
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extern enum attr_maskz_scalar get_attr_maskz_scalar (rtx_insn *);
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#define HAVE_ATTR_sdc 1
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extern enum attr_sdc get_attr_sdc (rtx_insn *);
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#define HAVE_ATTR_round 1
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extern enum attr_round get_attr_round (rtx_insn *);
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#define HAVE_ATTR_round_saeonly 1
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extern enum attr_round_saeonly get_attr_round_saeonly (rtx_insn *);
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#define HAVE_ATTR_round_expand 1
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extern enum attr_round_expand get_attr_round_expand (rtx_insn *);
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#define HAVE_ATTR_round_saeonly_expand 1
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extern enum attr_round_saeonly_expand get_attr_round_saeonly_expand (rtx_insn *);
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#define HAVE_ATTR_mask_expand4 1
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extern enum attr_mask_expand4 get_attr_mask_expand4 (rtx_insn *);
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#define HAVE_ATTR_mask_scalar 1
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extern enum attr_mask_scalar get_attr_mask_scalar (rtx_insn *);
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#define HAVE_ATTR_mask_scalarcz 1
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extern enum attr_mask_scalarcz get_attr_mask_scalarcz (rtx_insn *);
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#define HAVE_ATTR_mask_scalarc 1
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extern enum attr_mask_scalarc get_attr_mask_scalarc (rtx_insn *);
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#define HAVE_ATTR_round_scalar 1
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extern enum attr_round_scalar get_attr_round_scalar (rtx_insn *);
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#define HAVE_ATTR_round_scalarcz 1
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extern enum attr_round_scalarcz get_attr_round_scalarcz (rtx_insn *);
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#define HAVE_ATTR_round_saeonly_scalar 1
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extern enum attr_round_saeonly_scalar get_attr_round_saeonly_scalar (rtx_insn *);
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#define HAVE_ATTR_maskz_half 1
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extern enum attr_maskz_half get_attr_maskz_half (rtx_insn *);
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extern int num_delay_slots (rtx_insn *);
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extern int eligible_for_delay (rtx_insn *, int, rtx_insn *, int);
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extern int const_num_delay_slots (rtx_insn *);
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#define ANNUL_IFTRUE_SLOTS 0
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extern int eligible_for_annul_true (rtx_insn *, int, rtx_insn *, int);
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#define ANNUL_IFFALSE_SLOTS 0
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extern int eligible_for_annul_false (rtx_insn *, int, rtx_insn *, int);
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/* DFA based pipeline interface. */
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#ifndef AUTOMATON_ALTS
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#define AUTOMATON_ALTS 0
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#endif
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#ifndef AUTOMATON_STATE_ALTS
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#define AUTOMATON_STATE_ALTS 0
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#endif
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#ifndef CPU_UNITS_QUERY
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#define CPU_UNITS_QUERY 0
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#endif
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/* Initialize fn pointers for internal_dfa_insn_code
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and insn_default_latency. */
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extern void init_sched_attrs (void);
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/* Internal insn code number used by automata. */
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extern int (*internal_dfa_insn_code) (rtx_insn *);
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/* Insn latency time defined in define_insn_reservation. */
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extern int (*insn_default_latency) (rtx_insn *);
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/* Return nonzero if there is a bypass for given insn
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which is a data producer. */
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extern int bypass_p (rtx_insn *);
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/* Insn latency time on data consumed by the 2nd insn.
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Use the function if bypass_p returns nonzero for
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the 1st insn. */
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extern int insn_latency (rtx_insn *, rtx_insn *);
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/* Maximal insn latency time possible of all bypasses for this insn.
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Use the function if bypass_p returns nonzero for
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the 1st insn. */
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extern int maximal_insn_latency (rtx_insn *);
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#if AUTOMATON_ALTS
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/* The following function returns number of alternative
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reservations of given insn. It may be used for better
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insns scheduling heuristics. */
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extern int insn_alts (rtx);
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#endif
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/* Maximal possible number of insns waiting results being
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produced by insns whose execution is not finished. */
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extern const int max_insn_queue_index;
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/* Pointer to data describing current state of DFA. */
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typedef void *state_t;
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/* Size of the data in bytes. */
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extern int state_size (void);
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/* Initiate given DFA state, i.e. Set up the state
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as all functional units were not reserved. */
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extern void state_reset (state_t);
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/* The following function returns negative value if given
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insn can be issued in processor state described by given
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DFA state. In this case, the DFA state is changed to
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reflect the current and future reservations by given
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insn. Otherwise the function returns minimal time
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delay to issue the insn. This delay may be zero
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for superscalar or VLIW processors. If the second
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parameter is NULL the function changes given DFA state
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as new processor cycle started. */
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extern int state_transition (state_t, rtx);
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#if AUTOMATON_STATE_ALTS
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/* The following function returns number of possible
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alternative reservations of given insn in given
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DFA state. It may be used for better insns scheduling
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heuristics. By default the function is defined if
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macro AUTOMATON_STATE_ALTS is defined because its
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implementation may require much memory. */
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extern int state_alts (state_t, rtx);
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#endif
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extern int min_issue_delay (state_t, rtx_insn *);
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/* The following function returns nonzero if no one insn
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can be issued in current DFA state. */
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extern int state_dead_lock_p (state_t);
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/* The function returns minimal delay of issue of the 2nd
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insn after issuing the 1st insn in given DFA state.
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The 1st insn should be issued in given state (i.e.
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state_transition should return negative value for
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the insn and the state). Data dependencies between
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the insns are ignored by the function. */
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extern int min_insn_conflict_delay (state_t, rtx_insn *, rtx_insn *);
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/* The following function outputs reservations for given
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insn as they are described in the corresponding
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define_insn_reservation. */
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extern void print_reservation (FILE *, rtx_insn *);
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#if CPU_UNITS_QUERY
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/* The following function returns code of functional unit
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with given name (see define_cpu_unit). */
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extern int get_cpu_unit_code (const char *);
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/* The following function returns nonzero if functional
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unit with given code is currently reserved in given
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DFA state. */
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extern int cpu_unit_reservation_p (state_t, int);
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#endif
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/* The following function returns true if insn
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has a dfa reservation. */
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extern bool insn_has_dfa_reservation_p (rtx_insn *);
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/* Clean insn code cache. It should be called if there
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is a chance that condition value in a
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define_insn_reservation will be changed after
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last call of dfa_start. */
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extern void dfa_clean_insn_cache (void);
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extern void dfa_clear_single_insn_cache (rtx_insn *);
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/* Initiate and finish work with DFA. They should be
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called as the first and the last interface
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functions. */
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extern void dfa_start (void);
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extern void dfa_finish (void);
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#ifndef HAVE_ATTR_length
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#define HAVE_ATTR_length 0
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#endif
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#ifndef HAVE_ATTR_enabled
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#define HAVE_ATTR_enabled 0
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#endif
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#ifndef HAVE_ATTR_preferred_for_size
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#define HAVE_ATTR_preferred_for_size 0
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#endif
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#ifndef HAVE_ATTR_preferred_for_speed
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#define HAVE_ATTR_preferred_for_speed 0
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#endif
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#if !HAVE_ATTR_length
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extern int hook_int_rtx_insn_unreachable (rtx_insn *);
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#define insn_default_length hook_int_rtx_insn_unreachable
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#define insn_min_length hook_int_rtx_insn_unreachable
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#define insn_variable_length_p hook_int_rtx_insn_unreachable
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#define insn_current_length hook_int_rtx_insn_unreachable
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#include "insn-addr.h"
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#endif
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extern int hook_int_rtx_1 (rtx);
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#if !HAVE_ATTR_enabled
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||
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#define get_attr_enabled hook_int_rtx_1
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||
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#endif
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||
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#if !HAVE_ATTR_preferred_for_size
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||
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#define get_attr_preferred_for_size hook_int_rtx_1
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||
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#endif
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||
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#if !HAVE_ATTR_preferred_for_speed
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||
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#define get_attr_preferred_for_speed hook_int_rtx_1
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||
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#endif
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||
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||
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||
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#define ATTR_FLAG_forward 0x1
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||
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#define ATTR_FLAG_backward 0x2
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||
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||
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#endif /* GCC_INSN_ATTR_H */
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